Real-time architecture patterns for x86

Time:2020-07-13    Article published:Web【BACK】

    X86 is a family of backward compatible CPU instruction set architectures based on Intel 8086. The original 8086 processor was introduced by Intel in 1978. It was a 16-bit microprocessor.

  Intel names processors for digital formats such as 80x86. Intel 8086, 80186, 80286, 80386, and 80486 end in "86", so they are called "x86."

The x86 32-bit architecture is often referred to as IA-32 after "Intel Architecture 32-bit." Its 64-bit architecture was pioneered by AMD and is known as "AMD64". It was later adopted by Intel as the "Intel 64". Also commonly referred to as "x86-64" or "X64"

    The Intel 8086 and 8088 have 14 16-bit registers. Four of them (AX, BX, CX, DX) are generic (although each register has other USES; For example: Only CX can be used as a counter for loop instructions. Each register can be accessed as two separate bytes (so BX high is treated as BH and low as BL). In addition to these registers, there are four partition registers (CS, DS, SS, ES) that generate the absolute address of the memory. There are also two pointer registers (SP points to the bottom of the stack, and BP can be used to point to the stack or other parts of memory), and two pointer registers (SI and DI) can be used to point inside the array. , has a flag register (containing status flags such as carry, overflow, zero, etc.), and IP is used to point to the address of the running instruction.

    In real mode, access to memory is segmented. To get the last 20 bits of the memory address, move the segment address four bits to the left and add the offset address. Thus, the total addressable space in real mode is 2 bytes, or 1MB, an impressive symbol in 1979. In real mode, there are two addressing modes: NEAR and FAR. In FAR mode, you need to specify the range and offset. In NEAR mode, only the offset mode is specified, and the storage range is obtained through the appropriate range registers. DS registers are for data, CS registers are for code, and SS registers are for stack. For example, if DS is A000h and SI 5677h, DS: SI will point to the absolute address of the instrument DS×16 + SI = A5677h

Under this architecture, two different extension/offset pairs can point to the same absolute address. Therefore, if DS is A111h and SI 4567h, DS: SI will point to A5677h, which is the same as the previous paragraph. In addition to repeatability, this architecture cannot have more than four extensions at a time. In addition, CS, DS, and SS are necessary for the program to run properly, so only ES can be used to point to other locations. This pattern was originally intended to be compatible with Intel 8085, causing programmers endless misery.

    In addition to the above, the 8086 has an 8-bit 64K (also known as 16-bit 32K) input-output (EN: I/O) space and a hardware-supported 64K (one segment) storage stack. Only words (2 bytes) can be pushed onto the stack. The stack expands down from the top of memory, with the bottom pointed to by SS: SP. There are 256 interrupts, which can be hardware or software. Interrupts can be strung together using a stack to store the address of a program that returns an interrupt.